os3/stage1/interrupts.c
John 17a18e4f91
[Stage1] Start IDT implementation
[Stage1] Screen.h improvements
2023-01-18 10:59:09 +01:00

56 lines
No EOL
1.5 KiB
C

#include "include/interrupts.h"
#define EFFECTIVE_INTERRUPT_AMOUNT 32
__attribute__((aligned(0x10)))
idt_entry main_idt[EFFECTIVE_INTERRUPT_AMOUNT];
idt_ptr main_idt_ptr;
volatile void* interrupt_service_list[EFFECTIVE_INTERRUPT_AMOUNT];
void generic_exception() {
//clear_screen();
write_string("Exception received: ", 0);
write_number(0);
write_string("\n", 0);
__asm__("cli; hlt;");
while(1) {
}
}
/* The following is defined in interrupt_utils.asm */
extern void* interrupt_service_table[];
extern void load_idt(void* idtr_ptr);
extern void enable_interrupts();
/* --- */
void fill_idt() {
main_idt_ptr.base = (os_u32) &main_idt[0];
main_idt_ptr.limit = ((os_u16) (sizeof(idt_entry) * EFFECTIVE_INTERRUPT_AMOUNT)) - 1;
os_u32 val = (os_u32) interrupt_service_table[0];
write_string("ISR address: ", 0);
write_number(val);
write_string("\n", 1);
for (int i = 0; i < EFFECTIVE_INTERRUPT_AMOUNT; i++) {
//os_u32 val = (os_u32) interrupt_service_table[0];
os_u32 val = (os_u32) &generic_exception;
main_idt[i].isr_low = (os_u16)(val & 0xFFFF);
main_idt[i].isr_high = (os_u16)(val >> 16);
main_idt[i].kernel_gdt_code_segment = 0x08;
main_idt[i].reserved = 0;
/*
main_idt[i].attributes.present = 1;
main_idt[i].attributes.gate_type = IDT_GATE_TYPE_INTERRUPT_32;
main_idt[i].attributes.empty = 0;
main_idt[i].attributes.dpl = i == 0x49 ? 3 : 0;
*/
main_idt[i].attributes = 0x8e;
interrupt_service_list[i] = (void*)&generic_exception;
}
load_idt((void*)&main_idt_ptr);
enable_interrupts();
}